Architecture Intern, MS - Summer 2027

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.  At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.  Your Team, Your Impact Marvell’s Compute and Custom Solutions organization (CCS) is looking for a talented ASIC architect/engineering intern to join our architecture team. This team acts as the central technical interface to our datacenter clients. It is responsible for the overall technology choice, silicon partitioning strategy, IP definition and selection and architectural guidance of datacenter products (SmartNIC, servers, AI accelerators and switches, mainly) for the main hyperscalers and companies worldwide. We actively participate in the definition of next generation datacenter products with our clients and respond to their ASIC RFQs. Role spans engagement with both customers and internal technology teams to define the best solution to the custom product needs and includes all functions required to build, test and manufacture an advanced custom silicon System in a Package. What You Can Expect Engaging with customers, engineering, and marketing to help define chip architectures of innovative and complex datacenter products Identifying the best silicon partitioning, IP selection, packaging technology Mapping Marvell solutions into highly effective presentations and sharing with customers Communicating and coordinating with other business units in Marvell on internal IP and sharing/leveraging capabilities and knowledge Document findings and present results to the team. What We're Looking For Currently pursuing a Master’s Degree in Electrical Engineering, Computer Engineering, or a related field with an expected graduation date between Fall 2027 – Summer 2028 Experience with or knowledge of system architectures for datacenter products strongly appreciated Knowledge of CMOS technology and physical design flow. Passion for learning and working in a fast-paced, collaborative environment. Thrives in dynamic environments and through uncertainty and change Demonstrated ability to work collaboratively in periods of high pressure Excellent problem-solving and communication skills. Strong programming experience and knowledge preferred. Expected Base Pay Range (USD) 31 - 62, $ per hour. The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. 

 Additional Compensation and…