Principal Package Design Engineer
Renesas Electronics · San Jose, CALIFORNIA, United States · Hybrid
Posted Sep 30, 2026
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We are seeking a Senior Advanced Packaging Engineer to lead the development and integration of next-generation packaging solutions for high-performance semiconductors and electronic products. This role will focus on advanced package architectures, assembly processes, thermal and mechanical reliability, and cross-functional collaboration with design, manufacturing, suppliers, and quality teams. The ideal candidate has deep expertise in semiconductor packaging technologies and a strong track record of bringing complex products from concept through qualification and high-volume production.
Responsibilities
Lead the design, development, and qualification of advanced semiconductor packaging solutions, including: Flip-chip, Chip Embedding
Wafer-level packaging (WLP/FOWLP)
Panel-level packaging (laminate, molding)
2.5D/3D packaging
System-in-package (SiP)
Ball grid array (BGA/CSP)
Define package architecture based on electrical, thermal, mechanical, reliability, and cost requirements.
Drive package technology selection and development for new product introductions.
Work closely with IC design, substrate, board, thermal, reliability, and manufacturing teams to ensure package compatibility and performance.
Oversee package layout reviews, stack-up definition, material selection, and interconnect strategy.
Perform and guide simulations and analysis related to: Signal integrity / power integrity
Thermal performance
Mechanical stress / warpage
Design for manufacturability (DFM)
Develop assembly flows and process requirements for OSATs and manufacturing partners.
Lead package qualification activities, including DOE planning, failure analysis, and reliability testing.
Resolve packaging-related issues during NPI prototype builds, qualification, and production ramp.
Collaborate with suppliers and internal/external manufacturing partners on process improvements, material evaluation, and yield optimization.
Create and maintain package specifications, design rules, process documentation, and technical reports.
Mentor junior engineers and provide technical leadership across packaging initiatives.
Required
MSc or PhD degree in Electrical Engineering, Materials Science, Mechanical Engineering, Chemical Engineering, or related field.
5+ years of experience in semiconductor packaging or advanced electronics packaging.
Strong knowledge of advanced packaging technologies, materials, and assembly processes.
Experience with package reliability testing and qualification standards.
Deep understanding of thermal, mechanical, and electrical interactions in package design.
Experience working with OSATs, substrate vendors, assembly houses, and semiconductor supply chains.
Ability to troubleshoot packaging failures and drive root cause/corrective action.
Strong project leadership and cross-functional communication skills.
Preferred
Master’s or PhD in a relevant engineering discipline.
Experience with power semiconductor devices and…