Verification Engineer - Onsite PA or CA (6269)
itD Tech · Allentown, PA or Carlsbad, CA · United States · On-site
Pay: USD 34 – 34 a hour
Posted Aug 7, 2026
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itD is seeking a Verification Engineer to support the development and verification of next-generation System-on-Chip (SoC) solutions. The ideal candidate will have 5–12 years of design verification experience with expertise in UVM, SystemVerilog, and ASIC/SoC verification, along with a proven ability to deliver high-quality silicon solutions.
Location: 100% onsite in Allentown, PA or Carlsbad, CA .
Pay Rate: PA: $34.00–$34.20/hr | CA: $41.00–$41.40/hr, depending on experience.
We provide comprehensive medical benefits, a 401(k) plan, paid holidays, and more. Please note that we are only considering direct W2 candidates at this time, as we are unable to offer sponsorship.
Responsibilities:
Develop and maintain UVM-based verification environments for ASIC/SoC designs.
Create and execute block- and system-level verification plans.
Design verification components, including assertions, agents, traffic generators, and scoreboards.
Partner with cross-functional engineering teams to define verification strategies and improve design testability.
Debug and resolve complex design and verification issues throughout the development lifecycle.
Perform timing and gate-level simulations to validate design functionality.
Support post-silicon bring-up through C-based firmware development and verification activities.
Internal Responsibilities:
Attend regular internal practice community meetings.
Collaborate with your itD practice team on industry thought leadership.
Complete client case studies and learning material (blogs, media material).
Build out material to contribute to the Digital Transformation practice.
Attend internal itD networking events (in person and virtual).
Work with leadership on career fast-track opportunities.
Required Qualifications and Skills:
Bachelor's degree in Electrical Engineering or a related field.
5–12 years of ASIC or SoC design verification experience.
Strong experience developing UVM-based testbenches.
Proficiency with SystemVerilog.
Experience creating verification plans and verification infrastructure.
Knowledge of block- and system-level verification methodologies.
Experience with timing and gate-level simulation.
Experience debugging complex design and verification issues.
C programming experience for firmware development supporting post-silicon bring-up.
Preferred Qualifications and Skills:
Master's degree in Electrical Engineering, Communications Engineering, or a related field.
Experience with formal verification methodologies.
Proficiency with Python or Perl scripting for automation.
Advanced SystemVerilog coding and debug experience.
Experience with AI-driven CAD efficiency initiatives.
Experience with high-speed serial protocols (UCIe, PCIe, etc.).
Analog verification and debug experience, including DAC/ADC calibration and white-box verification.
Education:
Bachelor's degree in Electrical Engineering or a related field required.
Company…